The present invention relates to a semiconductor storage device.
Recently, an FBC (Floating Body Cell) memory is developed as a semiconductor memory which replaces a DRAM. In this FBC memory, a transistor is formed on an SOI (Silicon On Insulator) substrate. Data “1” is stored by storing holes in a floating body of the formed transistor, and data “0” is stored by discharging holes from the floating body.
More specifically, to write data “1” in the FBC, the electric potential of the gate electrode is set at, e.g., 1.5 V and the electric potential of the drain region is set at 1.5 V to cause the FBC to perform a so-called pentode operation, thereby storing holes generated by impact ionization into the floating body.
To write data “0” in the FBC, the electric potential of the gate electrode is set at, e.g., 1.5 V and the electric potential of the drain region is set at −1.5 V to bias the p-n junction between the floating body and drain region in the forward direction, thereby discharging holes stored in the floating body onto a bit line.
Accordingly, when data “1” is written in the FBC and holes are stored in the floating body, the electric potential of the floating body is high, so the gate threshold voltage is low. On the other hand, when data “0” is written in the FBC and no holes are stored in the floating body, the electric potential of the floating body is low, so the gate threshold voltage is high.
To read out data from the FBC, therefore, the electric potential of the gate electrode is set at, e.g., 1.5 V and the electric potential of the drain region is set at 0.2 V to cause the FBC to perform a so-called triode operation, so as not to destroy the data.
If data “1” is written in the FBC and holes are stored in the floating body, the gate threshold voltage is low, so the drain current (cell current) is large. On the other hand, if data “0” is written in the FBC and no holes are stored in the floating body, the gate threshold voltage is high, so the drain current (cell current) is small.
Accordingly, whether data “1” or “0” is written in the FBC as data to be read out from it is determined by checking whether the cell current is large or small on the basis of the gate threshold voltage difference.
If the gate threshold voltage difference is increased, the cell current difference also increases, so data to be read out from the FBC can be accurately determined. As a method of increasing the gate threshold voltage difference, the capacity of the floating body can be increased.
That is, when the capacity of the floating body is increased, it is possible to decrease the reduction with time of holes stored in the floating body. This suppresses the decrease in gate threshold voltage difference with time. Consequently, the gate threshold voltage difference becomes larger than that when the capacity of the floating body is small.
The capacity of the floating body is inversely proportional to the film thickness of a buried insulating film, and proportional to the contact area between the floating body and buried insulating film. As a method of increasing the capacity of the floating body, therefore, it is possible to decrease the film thickness of the buried insulating film, or increase the contact area between the floating body and buried insulating film.
In the method of decreasing the film thickness of the buried insulating film, however, if the buried insulating film is evenly thinned over the entire surface of the SOI substrate, a logic gate transistor to be formed in a region except for a prospective FBC region becomes difficult to design. In addition, if the film thickness of the buried insulating film in the prospective FBC region is changed from that in the other region, the fabrication process is complicated.
Furthermore, in the method of increasing the contact area between the floating body and buried insulating film, increasing the size of the FBC makes high integration difficult. In addition, if a plate electrode is also formed on the side surfaces of the floating body via the buried insulating film, the process is complicated, and the yield decreases.
A reference pertaining to the FBC memory is as follows.
Japanese Patent Laid-Open No. 2004-111643.